Charged Device Model (CDM) ESD Guns for ICs Testing

ESD-CDM ESD Guns for ICs Testing is specially designed for the characteristics and requirements of the electrostatic discharge immunity test of the Charged Device Model (CDM) discharge. It can test the electrostatic immunity of semiconductor devices such as LED chips, transistors and ICs. It is designed and manufactured in accordance with the requirements of the following corresponding standards, and fully meets the most stringent electrostatic voltage requirements in the following standards.

The ESD-CDM system mainly consists of three parts: DC high voltage source, Main instrument and electrostatic test probe (including attenuator). It can realize the electrostatic induction charging, electrostatic discharge and discharge signal acquisition test functions of the charged device model (CDM). Note: ESD-CDM can share a host with the ESD-883D HBM/MM ESD Simulators to test HBM, MM and CDM at the same time (LISUN model: ESD-883D/ESD-CDM)

System Configuration:
DC high voltage source:
a. Voltage output range: ±(10V~5kV);
b. Maximum allowable error of voltage output: ±(3%×reading value+10V);

Main instrument:
a. Insulate the high-voltage induction plate to prevent high-voltage leakage;
b. The “high-voltage induction plate + isolation plate” can be adjusted in three directions, with an adjustment range of 0~10cm and an adjustment accuracy of 0.1mm (manual adjustment);
c. Sensor board size: 12cm*12cm*2mm;
d. Isolation board size: 12cm*12cm*0.4mm, material: FR4

Electrostatic test probe:
a. Maximum measurement capability of electrostatic discharge current pulse peak ≥20A;
b. Probe size: Φ1.5*10mm, telescopic length: ≈3mm;
c. The test probe can move vertically (program control + manual control), with adjustable speed 0.1cm/s~5cm/s
d. The test probe part is equipped with an attenuator, and a data acquisition port/line is left for direct connection to an oscilloscope
e. Ground plane size: 63.5 mm*63.5 mm*6.35 mm

Schematic

Principle reference diagram（ANSI/ESDA/JEDEC JS-002-2014）

Schematic

Equivalent circuit diagram

Test Probe Physical Reference Picture

Base Physical Picture

Schematic diagram of three-dimensional adjustment of the base (reference)

Test Operation Process:
1. Place the DUT on the insulation board, fix the fixture, and face the pin upward;
2. Manually adjust the three-dimensional knob of the base to make the pin of the DUT in the center;
3. Manually control the test probe to the maximum displacement, confirm that it is in contact with the pin, and then restore its position;
4. Set the probe movement speed to an appropriate value;
4. Start the high voltage source to XX volts to put the DUT in an electrostatically induced charged state;
5. Make the probe automatically move down quickly and contact the pin to complete the CDM discharge process. At the same time, the discharge waveform data is transmitted to the oscilloscope via a coaxial cable for display and storage.

Schematic Diagram Of The Test Operation Process

ANSI/ESDA/JEDEC JS-002-2014 CDM ESD Test System - Introduction Video